1) Edge-Triggered Flip Flop:
An edge-triggered flip-flop is a sequential logic circuit that changes its output state based on the input signals when a specific clock edge occurs. This means that the output of an edge-triggered flip-flop changes at a precise moment during the clock signal, typically either at the rising edge (positive edge) or the falling edge (negative edge).
When the clock input exhibits an edge, the data on the data input is transferred to the output of the flip-flop.
There are two types of edge-triggered flip-flops:
a) Positive Edge-Triggered Flip-Flop: The output of this flip-flop changes when the clock input makes a positive transition (rising edge) from LOW to HIGH.
b) Negative Edge-Triggered Flip-Flop: The output of this flip-flop changes when the clock input makes a negative transition (falling edge) from HIGH to LOW.
Edge-triggered flip flops are useful in synchronous digital design, where the system's state changes in synchronization with the clock signal. They ensure predictable behavior and prevent race conditions by referencing a common timing signal to control when the data is stored or processed.
2) Pulse Flip Flop:
A pulse flip-flop, also known as a gated flip-flop or level-triggered flip-flop, is a sequential logic circuit whose output state depends on the input signals as long as a specific control signal (generally referred to as 'enable' or 'clock') is present.
When the enable signal is HIGH (active), the flip-flop behaves like a latch and stores the value of the data inputs into its internal storage elements. As long as the enable signal remains HIGH, the stored value will be maintained.
However, as soon as the enable signal goes LOW (inactive), the flip-flop becomes transparent, and the data stored in it becomes invisible. The output will follow any changes in the data input.
Pulse flip flops are used for temporary storage of data and can be implemented using combinatorial gates and feedback loops. They find applications in various digital circuits such as registers, counters, and sequential state machines.
In summary, an edge-triggered flip flop changes its output based on the input when a clock edge occurs, while a pulse flip flop stores the input value when an enable signal is HIGH and becomes transparent when the enable signal is LOW.